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EMG2 offers High Performance Computing, High Speed ​​Networking and Deep learning solutions based on the most powerful FPGA technologies on the market (XILINX and INTEL).

The EMG2 offer consists of FPGA boards based on Ultrascale, Ultrascale +, ZYNQ, Arria X, and Stratix 10. We also provide IPs and tools (Open CL, HLS, SDK, FDK) allowing us to advise you the best architecture to optimize technically and commercially your projects / needs.

In addition to its consulting, technical support and commercial activities, EMG2 relies on its partners and third party networks, enabling us to provide you with a global solution (Hardware and Software) for all types of applications.

For data storage and security optimization activities (Cybersecurity), EMG2 provides very high-speed (N X100 GigE) transmission solutions with real-time compression, encryption and filtering options.

For more specific needs, EMG2 offers tailor-made solutions (boards, servers) as well as complete system integration services. Thanks to this technology, we can, for example, optimize the consumption / performance ratio for data center applications.

EMG2 and Teratec
Thanks to its astonishing performances for parallelism and for the execution of many algorithms, FPGA technology is booming in intensive computing systems worldwide, as a hardware accelerator in conjunction with CPUs and GPUs. EMG2, with its range of products and services around FPGA, can help Teratec members optimize their HPC architectures, both in terms of performance and energy savings (FPGA technology consumes far less than its CPU and GPUs counterparts).

These are therefore complementary or alternative solutions for the constitution of the existing  and future HPC systems.

R&D Activities
EMG2 collaborates with its various partners (XILINX, Intel, IBM) as well as third parties to offer global solutions, in order to integrate more efficiently into HPC computers of new generations.

On the one hand, R & D activities are oriented to the system level (complete servers, integrating multiple CPU and FPGA resources), in order to provide optimized architectures allowing to take advantage of all the resources offered by the FPGA.

On the other hand, we work in parallel on the improvement of many IPs and on the implementation of algorithms optimized on FPGA to realize most efficiently the most complex functions and calculations.

The drivers and programming tools are also in full transformation with the arrival of Open CL, HLS and many other means of development high level. The objective is to accelerate and facilitate the implementation of various HPC and Big Data functions (Deep learning, Neural networks, Encryption, and Compression for mass storage…)


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