The TER@TEC Forum dedicated on the very fast development of HPC usage in many various domains
By gathering the best international experts in high performance numerical design and simulation, the TER@TEC Forum is the major event in France and in Europe in this domain. It confirms the importance of this sector in the development of industrial competitiveness, scientific research and innovation capacity.
The plenary sessions will illustrate the increasing impact of HPC in many areas of industry and research, and its role in major scientific and technological challenges, with the participation of industrial users, of international leading suppliers, and of personalities from the political, economical and academic worlds. An exhibition of around fifty booths will present innovations coming from the major players, manufacturers and software editors, integrators and distributors, services providers, etc. The workshops will address HPC major research and engineering topics and will be an opportunity to discover some major collaborative projects under development between industry and research.
Plenary sessions, Tuesday June 15 |
09h00 |
Welcome by Gerard ROUCAIROL, Président de TER@TEC |
09h10 |
Christine LAGARDE, French Minister of Economy, Industry and Employment (video) |
09h20 |
The HPC territorial implications
By Thierry MANDON, Deputy Chairman of the Essonne Regional Council |
09h40 |
High Performance Computing for competitiveness in Science and Industry
By Zoran STANcIc, Deputy Director General for Information Society and Medias, European Commission |
10h00 |
Networking - Exhibition |
10h45 |
UC HPC Programs
By Michael STRAYER, Associate Director, DOE Office of Advanced Scientific Computing Research |
11h20 |
Panorama and evolution of HPC usages
By Earl JOSEPH, IDC Program Vice President for HPC |
| 11h55 |
Power on of the most powerful European supercomputer : Tera 100
By Jean GONNORD, Program Director for Numerical Simulation & Computer Sciences, CEA |
| 12h00 |
Exascale Computing Project
By Leonardo Flores AÑOVER, Commission Européenne |
12h05 |
Sponsors presentation
With CAPS Entreprise, SGI, NVidia, INTEL, DDN et C&S |
12h25 |
Networking - Exhibition |
14h15 |
HPC simulation for aeronautical design
By Bruno STOUFFLET, Directeur de la Prospective, DASSAULT AVIATION |
14h40 |
Architecture and software evolution
By Pierre FIORINI, CEO HPC PROJECT |
15h05 |
HPC and sustainable city
By Hervé CHARRUE, Director of R&D, CSTB |
15h30 |
Networking - Exhibition |
16h15 |
The role of Simulation in the Innovation policy of an Automotive Tier 1
By Guillaume DEVAUCHELLE, Director of R&D, VALEO |
16h35 |
HPC and Cloud Computing for the audiovisual production and communication industries
By Jean-Charles HOURCADE, ACADEMIE DES TECHNOLOGIES |
17h00 |
BULL Joseph FOURIER Prize in association with GENCI
With the participation of Philippe VANNIER, CEO BULL and Catherine RIVIERE, CEO GENCI |
17h30 |
Networking - Cocktail – Exhibition |
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Exhibition with the major HPC players, Tuesday June 15 |
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Workshops, Wednesday June 16 |
 Systems Engineering
Wednesday June 16 from 9h00 to18h00
With the participation of DASSAULT AVIATION, TER@TEC, MIN. DEFENSE/DGA, AFIS, CNRS, DASSAULT SYSTEMES, EADS, C&S, UFRJ , RENAULT, INRIA and CSTB
The workshops will address systems engineering and will be introduced by a joint presentation by Ter@tec and SYSTEMATIC of research & development strategies concerning this key discipline, from early design phases to maintenance and decommissioning operations. A global overview of the systems engineering discipline will be presented by the French Association for Systems Engineering. Major topics will be addressed during the workshop: Systems Multidisciplinary Optimisation - Systems Optimisation and Automotive Applications - Civil Engineering Systems Applications and Challenges – Model Based Engineering Systems and Models Driven Architecture - Examples of innovative systems developments.
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The New Paradigms of Scientific Visualization
Wednesday June 16 from 9h00 to 13h00
With the participation of OXALYA, WEB3D Consortium, DFKI, KITWARE, CEA, BARCO, VISENSO, BRGM, UNIVERSITY OF CARDIFF, DISTENE, CSDL, FRAUNHOFER IGD, ECOLE CENTRALE DE PARIS et DASSAULT AVIATION
The workshop will present existing technologies and future high performance solutions. Major challenges still need to be taken up. They will be addressed during half a day of exchanges, combining market solutions, experience sharing and collaborative R&D projects presentations.
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Wednesday June 16 from
With the participation of CAP DIGITAL, C&S, THALES, THE BAKERY, DARKWORKS and MIKROS IMAGE
This workshop will allow participants to qualify the needs of the various Image production markets, to foresee the main technical evolutions and their adaptation to the different fields.
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Systemes architecture
Wednesday June 16 from 9h00 to 13h00
With the participation of CEA, CRAY, CLUSTERSTOR, SGI, HEWLETT PACKARD and KALRAY
We have just entered the Petascale era, and the period to come will see a tremendous increase of the number of very large HPC systems. On our way towards the next, but still far horizon of Exascale, it is also clear that a sustainable consolidation of the current or near-existing technologies will more and more have to tackle the architecture and system issues as a whole. Computing, communication, storage and data management elements will have to be integrated tightly in a balanced, energy-efficient and robust way to ensure the viability and acceptability of high end supercomputers. This workshop will address those global design and integration issues, through the enlightening visions of major players and leaders in the field of very high performance computing and data management systems.
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Parallel applications, the challenges of manycore architectures
Wednesday June 16 from 14h00 to 18h00
With the participation of CAPS ENTREPRISE, INRIA, BARCELONA SUPERCOMPUTING CENTER, ALLINEA et MICROSOFT
Manycore processors are here. Energy saving tends to favor heterogeneous architectures that combine general-purpose cores with streaming co-processors such as GPUs. To exploit the tremendous computing power of these systems, software refactoring that extracts massive parallelism is unavoidable. There is no “silver bullet” to transparently solve this issue.
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With the participation of HPC PROJECT, NVIDIA, MIT, NATIONAL INSTRUMENTS, INRIA, ECOLE NATIONALE DES MINES DE SAINT-ETIENNE and PSA PEUGEOT CITROËN
ScilabTec is a unique opportunity to deal with a wide range of subjects, share experiences and feedbacks, and discuss with the members of the Scilab Consortium research and development team, with thematic and technical sessions in the morning and plenary presentations in the afternoon.
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TER@TEC Forum 2010 |
Free participation in conferences and workshops |
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TER@TEC Forum 2010 sponsored by
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European Pole of Competence in High Performance Numerical Design and Simulation
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Building a European technopole for High performance Simulation and Computing
 13 000 m2 of offices and labs
1 000 people
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